This course introduces basics and fundamentals of the general purpose computer architecture. Course objectives include:
Teaching Load (Spring 2016):
Course work and assesment (out of 100) are as follows:
Attendance: 10 marks
5 Labs: Using HDL to design a simplified processor
Lab work: 10 marks
A Project: Design and testing of a simplified MIPS processor (10 marks)
A Midterm exam: 20 marks
A Final Exam: 50 marks
CAD Tools to be used are:
Lecture 1 | Syllabus and Introcuction | [PDF] |
Lecture 2, 3, 4 | MIPS Instruction Set Architecture | [PDF] |
Lecture 5, 6, 7 | Hardware Description Languages | [PDF] [PDF] |
Lecture 8, 9, 10 | MIPS Microarchitecture | [PDF] |
Lecture 11, 12 | Memory and I/O Systems | [PDF] |
Sheet 1 | MIPS Instruction Set Architecture | [PDF] |
Sheet 2 | MIPS Micro Architecture | [PDF] |
Sheet 3 | Memory and I/O Subsystems | [PDF] |
Mid-term Exams | 2016 |
Final Exams | 2016 |